Implementation of a double StereoDipole system on a DSP board – Eperimental validation and subjective evaluation inside a car cockpit

20 October 2003

WASPAA 2003 - New Paltz, NY

DSP’s performances:

Industrial Engineering Dept.

University of Parma – Italy

FIR filter implementation:

• Using a sampling frequency of 48 kHz, a 2000-taps direct-form FIR can be implemented

Maximun length of the Impulse Response is around 40 ms !!

SIMD architecture of this processor (dual ALU) allows to implement a 2000-taps FIR filtering simultaneously on two independent data flows (stereo processing).